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| author | Rajat Jain <[email protected]> | 2017-01-02 22:34:10 -0800 |
|---|---|---|
| committer | Bjorn Helgaas <[email protected]> | 2017-02-10 17:14:52 -0600 |
| commit | 0fc1223f0e77a748f7040562faaa7027f7db71ca (patch) | |
| tree | 2265dce7f56f188bf4ab7f4db698dcd1d98c43a6 /tools/perf/util/c++/clang.cpp | |
| parent | 7ce7d89f48834cefece7804d38fc5d85382edf77 (diff) | |
PCI/ASPM: Add L1 substate capability structure register definitions
Add L1 substate capability structure register definitions for use in
subsequent patches. See the PCIe r3.1 spec, sec 7.33.
[bhelgaas: add PCIe spec reference]
Signed-off-by: Rajat Jain <[email protected]>
Signed-off-by: Bjorn Helgaas <[email protected]>
Diffstat (limited to 'tools/perf/util/c++/clang.cpp')
0 files changed, 0 insertions, 0 deletions