diff options
author | Alexander Lobakin <[email protected]> | 2020-01-22 13:58:50 +0300 |
---|---|---|
committer | Paul Burton <[email protected]> | 2020-01-22 10:16:47 -0800 |
commit | 18d84e2e55b6abe1e5b8a658ad078796122899fb (patch) | |
tree | e31bb34a5203c09d6aa16a06f4d2c25ff6ba6039 /tools/perf/util/c++/clang-test.cpp | |
parent | 7de86604bbe4ecb3da0c8c40d4e4b1549e879f92 (diff) |
MIPS: make CPU_HAS_LOAD_STORE_LR opt-out
CPU_HAS_LOAD_STORE_LR was introduced in 932afdeec18b ("MIPS: Add Kconfig
variable for CPUs with unaligned load/store instructions") to make code
in kernel/unaligned.c and lib/mem{cpy,set}.S more intuitive and give a
possibility to easily add new CPUs without these instruction sets in
future.
Hovewer, this variant is not optimal for mainly two reasons:
* For now, we have 20+ CPUs with such instructions and only two (MIPS R6)
without. It will obviously be more effective and straightforward to
have an option for these two rather than for the rest.
* You can easily miss the fact that you need to select this option when
adding a new CPU, while all processors lacking these sets are
well-known, so the probability of missing something is way much lower.
We can address both points by turning CPU_HAS_LOAD_STORE_LR into opt-out
CPU_NO_LOAD_STORE_LR. This also makes MIPS root Kconfig more clear and
understandable.
Signed-off-by: Alexander Lobakin <[email protected]>
Signed-off-by: Paul Burton <[email protected]>
Cc: Ralf Baechle <[email protected]>
Cc: Alexandre Belloni <[email protected]>
Cc: Microchip Linux Driver Support <[email protected]>
Cc: Will Deacon <[email protected]>
Cc: Greg Kroah-Hartman <[email protected]>
Cc: Masahiro Yamada <[email protected]>
Cc: Paul Walmsley <[email protected]>
Cc: Michal Simek <[email protected]>
Cc: Allison Randal <[email protected]>
Cc: Thomas Gleixner <[email protected]>
Cc: Eric W. Biederman <[email protected]>
Cc: [email protected]
Cc: [email protected]
Diffstat (limited to 'tools/perf/util/c++/clang-test.cpp')
0 files changed, 0 insertions, 0 deletions