diff options
| author | Dmitry Osipenko <digetx@gmail.com> | 2018-11-25 00:13:46 +0300 |
|---|---|---|
| committer | Thierry Reding <treding@nvidia.com> | 2019-01-16 13:21:45 +0100 |
| commit | 82cdfc382b940b441e93188507c5ae68f9582e3d (patch) | |
| tree | 387ca6b3cbb2323132a75857664d27c0172233b7 /tools/perf/ui/browsers/annotate.c | |
| parent | bfeffd155283772bbe78c6a05dec7c0128ee500c (diff) | |
ARM: tegra: Fix missed EMC registers latching on resume from LP1 on Tegra30+
The memory interface configuration and re-calibration interval are left
unassigned on resume from LP1 because these registers are shadowed and
require latching after being adjusted.
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Reviewed-by: Jon Hunter <jonathanh@nvidia.com>
Tested-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Diffstat (limited to 'tools/perf/ui/browsers/annotate.c')
0 files changed, 0 insertions, 0 deletions