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author | Biju Das <[email protected]> | 2022-04-02 08:30:34 +0100 |
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committer | Geert Uytterhoeven <[email protected]> | 2022-04-13 12:21:04 +0200 |
commit | eb2789785428e2dbc3d5f413b16c67ff90d828c1 (patch) | |
tree | 61e662b72c77d34707342e56d3038a3128104c98 /tools/perf/scripts | |
parent | 3123109284176b1532874591f7c81f3837bbdc17 (diff) |
dt-bindings: clock: Add R9A07G043 CPG Clock and Reset Definitions
Define RZ/G2UL (R9A07G043U) Clock Pulse Generator Core Clock and module
clock outputs, as listed in Table 7.1.4.2 ("Clock List r0.51") and also
add Reset definitions referring to registers CPG_RST_* in Section 7.2.3
("Register configuration") of the RZ/G2UL Hardware User's Manual (Rev.
0.51, Nov. 2021).
Signed-off-by: Biju Das <[email protected]>
Reviewed-by: Lad Prabhakar <[email protected]>
Acked-by: Rob Herring <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Geert Uytterhoeven <[email protected]>
Diffstat (limited to 'tools/perf/scripts')
0 files changed, 0 insertions, 0 deletions