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authorGeert Uytterhoeven <[email protected]>2020-08-19 14:59:00 +0200
committerMark Brown <[email protected]>2020-08-20 22:38:13 +0100
commitfeace90233a8cd44a18902216657279c3932d471 (patch)
treedd76fa433e164725fc2f940b1fa265b9f76e768e /tools/perf/scripts/python
parent8dd71698607f822c3675c366a8a79bc82f7621f8 (diff)
spi: rspi: Increase bit rate accuracy on RZ/A
rspi_rz_set_config_register() favors high values of "brdv" over high values of "spbr". As "brdv" is not a plain divider, but controls a power-of-two divider, this may cause the selection of non-optimal divider values. E.g. on RSK+RZA1, when 3.8 MHz is requested, the actual configured bit rate is 2.08 MHz (spbr = 1, brdv = 3), while 3.7 MHz would be possible (spbr = 8, brdv = 0). Fix this by only resorting to higher "brdv" values when really needed. This makes the driver always pick optimal divider values on RZ/A. Signed-off-by: Geert Uytterhoeven <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Mark Brown <[email protected]>
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