diff options
| author | Damien Lespiau <[email protected]> | 2015-05-06 14:36:27 +0100 |
|---|---|---|
| committer | Daniel Vetter <[email protected]> | 2015-05-08 13:03:44 +0200 |
| commit | f1d3d34d1740e13f01411d85f53945596488d4c1 (patch) | |
| tree | d87cf731b9e48fe4e094b9281d5d58f7a3d47a3e /tools/perf/scripts/python | |
| parent | 22e02c0b4bc87c94895b1f4cb25ee705d5687cb1 (diff) | |
drm/i915/skl: Fix WaDisableChickenBitTSGBarrierAckForFFSliceCS
Robert noticed that the FF_SLICE_CS_CHICKEN2 offset was wrong. Ooops.
Ville noticed that the write was wrong since FF_SLICE_CS_CHICKEN2 is a
masked register. Re-oops.
A wonder if went through 2 people while having roughly a bug per line...
The problem was introduced in the original patch:
commit 2caa3b260aa6a3d015352c07d1bce1461825fa6c
Author: Damien Lespiau <[email protected]>
Date: Mon Feb 9 19:33:20 2015 +0000
drm/i915/skl: Implement WaDisableChickenBitTSGBarrierAckForFFSliceCS
v2: Also fix the register write (Ville)
Reported-by: Robert Beckett <[email protected]>
Reported-by: Ville Syrjälä <[email protected]>
Cc: Robert Beckett <[email protected]>
Cc: Ville Syrjälä <[email protected]>
Cc: Nick Hoath <[email protected]>
Signed-off-by: Damien Lespiau <[email protected]>
Reviewed-by: Ville Syrjälä <[email protected]>
Signed-off-by: Daniel Vetter <[email protected]>
Diffstat (limited to 'tools/perf/scripts/python')
0 files changed, 0 insertions, 0 deletions