diff options
author | Gayatri Kammela <[email protected]> | 2021-08-16 09:58:32 -0700 |
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committer | Hans de Goede <[email protected]> | 2021-08-20 20:33:35 +0200 |
commit | ee7e89ff80063616c7f81b97ce7d38733019531a (patch) | |
tree | cd22fc855f067609c48f1be4841579387fc8f844 /tools/perf/scripts/python | |
parent | bbab31101f44911b24c9da02733ce196e5702fea (diff) |
platform/x86/intel: pmc/core: Add Latency Tolerance Reporting (LTR) support to Alder Lake
Add support to show the Latency Tolerance Reporting for the IPs on
the Alder Lake PCH as reported by the PMC. This LTR support on
Alder Lake is slightly different from the Cannon lake PCH that is being
reused by all platforms till Tiger Lake.
Cc: Chao Qin <[email protected]>
Cc: Srinivas Pandruvada <[email protected]>
Cc: Andy Shevchenko <[email protected]>
Cc: David Box <[email protected]>
Tested-by: You-Sheng Yang <[email protected]>
Acked-by: Rajneesh Bhardwaj <[email protected]>
Reviewed-by: Hans de Goede <[email protected]>
Reviewed-by: Andy Shevchenko <[email protected]>
Signed-off-by: Gayatri Kammela <[email protected]>
Link: https://lore.kernel.org/r/5ca3ea090b53a9bf918b055447ab5c8ef2925cc4.1629091915.git.gayatri.kammela@intel.com
Signed-off-by: Hans de Goede <[email protected]>
Diffstat (limited to 'tools/perf/scripts/python')
0 files changed, 0 insertions, 0 deletions