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| author | Krzysztof Kozlowski <[email protected]> | 2023-04-16 14:37:29 +0200 |
|---|---|---|
| committer | Bjorn Andersson <[email protected]> | 2023-05-26 13:29:08 -0700 |
| commit | ec888e6cff94af8fc5889824d98b1f1df65f3131 (patch) | |
| tree | ace2b7e73b877d9a2eb818cf0475ca8b8aad0328 /tools/perf/scripts/python | |
| parent | 2438aba45f65b723763299a7b34eddfc40923680 (diff) | |
arm64: dts: qcom: sm8550-qrd: add missing PCIE1 PHY AUX clock frequency
The SM8550 DTSI defines a fixed PCIE1 PHY AUX clock and expects boards
to define frequency. Use the same as in MTP8550 to fix:
sm8550-qrd.dtb: pcie-1-phy-aux-clk: 'clock-frequency' is a required property
Signed-off-by: Krzysztof Kozlowski <[email protected]>
Reviewed-by: Konrad Dybcio <[email protected]>
Signed-off-by: Bjorn Andersson <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Diffstat (limited to 'tools/perf/scripts/python')
0 files changed, 0 insertions, 0 deletions