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authorPaul Kocialkowski <paul.kocialkowski@bootlin.com>2018-12-05 10:24:34 +0100
committerMaxime Ripard <maxime.ripard@bootlin.com>2018-12-05 12:03:43 +0100
commitebc0a24d11b3618e7680e117ee3be421c09ad43a (patch)
treee8145a6e78d7946a418f3972ffa29736434bd41e /tools/perf/scripts/python
parent46d1ec73c19067dad22523632306e3fffedb5f11 (diff)
dt-bindings: sram: sunxi: Add bindings for the H5 with SRAM C1
This introduces new bindings for the H5 SoC in the SRAM controller. Because the SRAM layout is different from other SoCs, no backward compatibility is assumed with any of them. However, the C1 SRAM section alone looks similar to previous SoCs, so it is compatible with the initial A10 binding. Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com> Acked-by: Chen-Yu Tsai <wens@csie.org> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
Diffstat (limited to 'tools/perf/scripts/python')
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