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authorVille Syrjälä <[email protected]>2013-10-04 20:32:25 +0300
committerDaniel Vetter <[email protected]>2013-10-10 12:46:57 +0200
commite1553faa904f3f8bdd734ee1404ce39c652bc9c6 (patch)
tree17267c8c11966a72b59f1af46b47c30992b93c4c /tools/perf/scripts/python
parentf01b796283e0fb2aa70b7cceb7067340f8ec6626 (diff)
drm/i915: Fix VGA_DISP_DISABLE check
The VGACNTRL register contains a bunch of other stuff besides the VGA_DISP_DISABLE bit. When we write the register we always set those other bits to zero, so normally the current check would work. However on HSW disabling and re-enabling the power well will reset the VGACNTRL register to its default value, which has several of the other bits set as well. So only look at the VGA_DISP_DISABLE bit when checking whether the VGA plane needs re-disabling. Signed-off-by: Ville Syrjälä <[email protected]> Reviewed-by: Jesse Barnes <[email protected]> Signed-off-by: Daniel Vetter <[email protected]>
Diffstat (limited to 'tools/perf/scripts/python')
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