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authorLars-Peter Clausen <[email protected]>2019-03-19 13:37:55 +0200
committerJonathan Cameron <[email protected]>2019-04-04 20:21:15 +0100
commitdf1d80aee963480c5c2938c64ec0ac3e4a0df2e0 (patch)
tree7a71da35da3a7573ae4e08a510ab7c8838c8f5f2 /tools/perf/scripts/python
parent6ec417d2f1a028705a1ae6f59d3e15344f6a4fbe (diff)
iio: ad_sigma_delta: Properly handle SPI bus locking vs CS assertion
For devices from the SigmaDelta family we need to keep CS low when doing a conversion, since the device will use the MISO line as a interrupt to indicate that the conversion is complete. This is why the driver locks the SPI bus and when the SPI bus is locked keeps as long as a conversion is going on. The current implementation gets one small detail wrong though. CS is only de-asserted after the SPI bus is unlocked. This means it is possible for a different SPI device on the same bus to send a message which would be wrongfully be addressed to the SigmaDelta device as well. Make sure that the last SPI transfer that is done while holding the SPI bus lock de-asserts the CS signal. Signed-off-by: Lars-Peter Clausen <[email protected]> Signed-off-by: Alexandru Ardelean <[email protected]> Signed-off-by: Jonathan Cameron <[email protected]>
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