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| author | Tao Zhang <[email protected]> | 2024-02-04 13:30:39 +0800 |
|---|---|---|
| committer | Suzuki K Poulose <[email protected]> | 2024-02-12 10:29:47 +0000 |
| commit | dc6ce57e2aa0b10b0b78517245ea0ba47eed75b1 (patch) | |
| tree | a571f23c1b05dc0cc330e4ab1fa3a15170c0b318 /tools/perf/scripts/python | |
| parent | 53d4a017a52458d835a1f9524df09c65c2208400 (diff) | |
coresight-tpdm: Add timestamp control register support for the CMB
CMB_TIER register is CMB subunit timestamp insertion enable register.
Bit 0 is PATT_TSENAB bit. Set this bit to 1 to request a timestamp
following a CMB interface pattern match. Bit 1 is XTRIG_TSENAB bit.
Set this bit to 1 to request a timestamp following a CMB CTI timestamp
request. Bit 2 is TS_ALL bit. Set this bit to 1 to request timestamp
for all packets.
Reviewed-by: James Clark <[email protected]>
Signed-off-by: Tao Zhang <[email protected]>
Signed-off-by: Jinlong Mao <[email protected]>
Signed-off-by: Suzuki K Poulose <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Diffstat (limited to 'tools/perf/scripts/python')
0 files changed, 0 insertions, 0 deletions