diff options
| author | Mohit Kumar <[email protected]> | 2014-02-19 17:34:35 +0530 |
|---|---|---|
| committer | Bjorn Helgaas <[email protected]> | 2014-02-19 14:47:13 -0700 |
| commit | dbffdd6862e67d60703f2df66c558bf448f81d6e (patch) | |
| tree | 37daa414bf6e1d4b81f2b0eeee64e2bfca0a7425 /tools/perf/scripts/python | |
| parent | 38dbfb59d1175ef458d006556061adeaa8751b72 (diff) | |
PCI: designware: Fix RC BAR to be single 64-bit non-prefetchable memory BAR
The Synopsys PCIe core provides one pair of 32-bit BARs (BAR 0 and BAR 1).
The BARs can be configured as follows:
- One 64-bit BAR: BARs 0 and 1 are combined to form a single 64-bit BAR
- Two 32-bit BARs: BARs 0 and 1 are two independent 32-bit BARs
This patch corrects 64-bit, non-prefetchable memory BAR configuration
implemented in dw driver.
Signed-off-by: Mohit Kumar <[email protected]>
Signed-off-by: Bjorn Helgaas <[email protected]>
Cc: Pratyush Anand <[email protected]>
Cc: Jingoo Han <[email protected]>
Cc: Arnd Bergmann <[email protected]>
Cc: [email protected] # v3.12+
Diffstat (limited to 'tools/perf/scripts/python')
0 files changed, 0 insertions, 0 deletions