diff options
| author | Oscar Mateo <[email protected]> | 2018-05-08 14:29:24 -0700 |
|---|---|---|
| committer | Mika Kuoppala <[email protected]> | 2018-05-11 15:54:18 +0300 |
| commit | d65dc3e40b80ab63fb0d70c947558d0f49f912da (patch) | |
| tree | 2582b3bbba2fcc4bae19f611ea553bffa7835cd1 /tools/perf/scripts/python | |
| parent | cc38cae7c4e9350c93aa2da506086415fecd6e4a (diff) | |
drm/i915/icl: Enable Sampler DFR
Sampler Dynamic Frequency Rebalancing (DFR) aims to reduce Sampler
power by dynamically changing its clock frequency in low-throughput
conditions. This patches enables it by default on Gen11.
v2: Wrong operation to clear the bit (Praveen)
v3: Rebased on top of the WA refactoring
v4: Move to icl_init_clock_gating, since it's not a WA (Rodrigo)
v5: C, not lisp (Chris)
Signed-off-by: Oscar Mateo <[email protected]>
Cc: Praveen Paneri <[email protected]>
Cc: Mika Kuoppala <[email protected]>
Reviewed-by: Sagar Arun Kamble <[email protected]>
Reviewed-by: Rodrigo Vivi <[email protected]>
Signed-off-by: Mika Kuoppala <[email protected]>
Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
Diffstat (limited to 'tools/perf/scripts/python')
0 files changed, 0 insertions, 0 deletions