diff options
| author | Ville Syrjälä <[email protected]> | 2013-11-21 21:29:45 +0200 |
|---|---|---|
| committer | Daniel Vetter <[email protected]> | 2013-11-25 09:43:18 +0100 |
| commit | d629336b6af9ff214e9d1e7224946a000fc8f70f (patch) | |
| tree | 254bb8ae056ee88115c6e6fb54b8fcf5aa683ded /tools/perf/scripts/python | |
| parent | b33ecdd1cdeb90ca07dd28d648558e87c8680443 (diff) | |
drm/i915: Don't set the fence number in DPFC_CTL on SNB
SNB has another register where the actual FBC CPU fence number is
stored. The documenation explicitly states that the fence number
in DPFC_CTL must be 0 on SNB. And in fact when it's not zero,
the GTT tracking simply doesn't work.
Signed-off-by: Ville Syrjälä <[email protected]>
Reviewed-by: Chris Wilson <[email protected]>
Signed-off-by: Daniel Vetter <[email protected]>
Diffstat (limited to 'tools/perf/scripts/python')
0 files changed, 0 insertions, 0 deletions