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authorSuman Anna <[email protected]>2024-02-15 16:00:34 +0530
committerVignesh Raghavendra <[email protected]>2024-02-19 13:42:01 +0530
commitd4e8c8ad5d14ad51ed8813442d81c43019fd669d (patch)
treed7e4f887923bf1f57ed7c9db852148fbec3b58d0 /tools/perf/scripts/python
parent5f0e6ce354f61092182b79d177585bd7310f12a2 (diff)
arm64: dts: ti: k3-am64-main: Add ICSSG IEP nodes
The ICSSG IP on AM64x SoCs have two Industrial Ethernet Peripherals (IEPs) to manage/generate Industrial Ethernet functions such as time stamping. Each IEP sub-module is sourced from an internal clock mux that can be derived from either of the IP instance's ICSSG_IEP_GCLK or from another internal ICSSG CORE_CLK mux. Add both the IEP nodes for both the ICSSG instances. The IEP clock is currently configured to be derived indirectly from the ICSSG_ICLK running at 250 MHz. Signed-off-by: Grygorii Strashko <[email protected]> Signed-off-by: Suman Anna <[email protected]> Reviewed-by: Ravi Gunasekaran <[email protected]> Reviewed-by: Roger Quadros <[email protected]> Signed-off-by: MD Danish Anwar <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Vignesh Raghavendra <[email protected]>
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