diff options
| author | Kan Liang <kan.liang@linux.intel.com> | 2021-04-12 07:31:04 -0700 |
|---|---|---|
| committer | Peter Zijlstra <peterz@infradead.org> | 2021-04-19 20:03:29 +0200 |
| commit | d0ca946bcf84e1f9847571923bb1e6bd1264f424 (patch) | |
| tree | eb03db27fb53efc02ad494f5070d62472ac49b8a /tools/perf/scripts/python | |
| parent | 19d3a81fd92dc9b73950564955164ecfd0dfbea1 (diff) | |
perf/x86/cstate: Add Alder Lake CPU support
Compared with the Rocket Lake, the CORE C1 Residency Counter is added
for Alder Lake, but the CORE C3 Residency Counter is removed. Other
counters are the same.
Create a new adl_cstates for Alder Lake. Update the comments
accordingly.
The External Design Specification (EDS) is not published yet. It comes
from an authoritative internal source.
The patch has been tested on real hardware.
Signed-off-by: Kan Liang <kan.liang@linux.intel.com>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Reviewed-by: Andi Kleen <ak@linux.intel.com>
Link: https://lkml.kernel.org/r/1618237865-33448-25-git-send-email-kan.liang@linux.intel.com
Diffstat (limited to 'tools/perf/scripts/python')
0 files changed, 0 insertions, 0 deletions