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authorSowjanya Komatineni <[email protected]>2020-08-12 02:27:21 +0200
committerMauro Carvalho Chehab <[email protected]>2020-08-28 15:14:16 +0200
commitcc9d3fa2d599675a940be5fdbf46f01d6d236a24 (patch)
tree1abe77734d22e702ba54f7ae6074e21c48ca392b /tools/perf/scripts/python
parent523c857e34ce025b993e4f85864644f579a08aac (diff)
media: tegra-video: Compute settle times based on the clock rate
Settle time determines the number of cil clock cyles to wait after LP00 when moving from LP to HS. This patch computes T-CLK-SETTLE and T-HS-SETTLE times based on cil clock rate and pixel rate from the sensor and programs them during streaming. T-CLK-SETTLE time is the interval during which receiver will ignore any HS transitions on clock lane starting from the beginning of T-CLK-PREPARE. T-HS-SETTLE time is the interval during which recevier will ignore any HS transitions on data lane starting from the beginning of T-HS-PREPARE. Signed-off-by: Sowjanya Komatineni <[email protected]> Signed-off-by: Hans Verkuil <[email protected]> Signed-off-by: Mauro Carvalho Chehab <[email protected]>
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