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authorHawking Zhang <[email protected]>2023-09-06 17:56:20 +0800
committerAlex Deucher <[email protected]>2023-09-06 14:36:57 -0400
commitc2c23a10f18016baab5c8762f9bce5bf80cc6b8f (patch)
tree23925d8282b72d1fafa6360e95cb12f1f597d041 /tools/perf/scripts/python
parent1b8e56b994592fe8909fdf9d81674a9bf5947217 (diff)
drm/amdgpu: Correct se_num and reg_inst for gfx v9_4_3 ras counters
gfx_v9_4_3_ue|ce_reg_list is an array per gfx core instance correct the settings of se_num and reg_inst for some of gfx ras counters so all the available register instances can be polled for ras status. Signed-off-by: Hawking Zhang <[email protected]> Reviewed-by: Tao Zhou <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
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