drm/i915/psr: Split sel fetch plane configuration into arm and noarm

SEL_FETCH_CTL registers are armed immediately when plane is disabled.
SEL_FETCH_* instances of plane configuration are used when doing
selective update and normal plane register instances for full updates.
Currently all SEL_FETCH_* registers are written as a part of noarm
plane configuration. If noarm and arm plane configuration are not
happening within same vblank we may end up having plane as a part of
selective update before it's PLANE_SURF register is written.

Fix this by splitting plane selective fetch configuration into arm and
noarm versions and call them accordingly. Write SEL_FETCH_CTL in arm
version.

v3:
 - add arm suffix into intel_psr2_disable_plane_sel_fetch
v2:
 - drop color_plane parameter from arm part
 - dev_priv -> i915 in arm part

Cc: Ville Syrjälä <[email protected]>
Cc: José Roberto de Souza <[email protected]>
Cc: Mika Kahola <[email protected]>
Cc: Vinod Govindapillai <[email protected]>
Cc: Stanislav Lisovskiy <[email protected]>
Cc: Luca Coelho <[email protected]>
Signed-off-by: Jouni Högander <[email protected]>
Reviewed-by: José Roberto de Souza <[email protected]>
Reviewed-by: Luca Coelho <[email protected]>
Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]

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