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authorGrygorii Strashko <[email protected]>2016-08-30 17:58:01 +0300
committerTony Lindgren <[email protected]>2016-08-31 07:37:40 -0700
commitc097338ebd3f7a0920dbe1a5d9bf276207f7b024 (patch)
treea1ce6866656760d583a79351d6be0c0e54aa6cab /tools/perf/scripts/python
parentdbb9c1963285d5d1d3a8c12ad72ddacbd46fc845 (diff)
ARM: dts: dra7: cpsw: fix clocks tree
Current clocks tree definition for CPSW/CPTS doesn't correspond TRM for dra7/am57 SoCs. CPTS: has to be sourced from gmac_rft_clk_mux clock CPSW: DPLL_GMAC -> CLKOUT_M2 -> GMAC_250M_CLK -> 1/2 -> -> GMAC_MAIN_CLK (125 MHZ) Hence, correct clock tree for GMAC_MAIN_CLK and use proper clock for CPTS. This also require updating of CPTS clock multiplier. Signed-off-by: Grygorii Strashko <[email protected]> Reviewed-by: Mugunthan V N <[email protected]> Acked-by: Tero Kristo <[email protected]> Signed-off-by: Tony Lindgren <[email protected]>
Diffstat (limited to 'tools/perf/scripts/python')
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