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authorJames Hogan <[email protected]>2015-01-29 11:14:08 +0000
committerRalf Baechle <[email protected]>2015-03-31 12:04:12 +0200
commitb720fd8b66151a8bdf6ec1be32c338d73592ff15 (patch)
treeeaa54d5c015f9599155b5010c9b7eca051c39721 /tools/perf/scripts/python
parent8f7ff027965619b17488141a5f39d14c850696ab (diff)
irqchip: mips-gic: Don't treat FDC IRQ as percpu devid
Treat the Fast Debug Channel (FDC) interrupt the same as the timer and performance counter interrupts. Like them, the FDC IRQ is also per-VPE, and also doesn't use a per-CPU device ID yet. Per-CPU device IDs don't seem to work with IRQF_SHARED which is needed for compatibility with cores which don't route the FDC IRQ through the GIC. For hardware which routes FDC IRQs through the GIC this is something that could be added later. Signed-off-by: James Hogan <[email protected]> Cc: Ralf Baechle <[email protected]> Cc: Andrew Bresticker <[email protected]> Cc: Thomas Gleixner <[email protected]> Cc: Jason Cooper <[email protected]> Cc: [email protected] Cc: [email protected] Patchwork: https://patchwork.linux-mips.org/patch/9141/ Signed-off-by: Ralf Baechle <[email protected]>
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