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authorLucas Stach <[email protected]>2023-05-25 22:05:53 -0500
committerNeil Armstrong <[email protected]>2023-05-26 09:20:40 +0200
commita617b33f7e513f25becf843bc97f8f1658c16337 (patch)
treed3b5c8d0357dc90b32e8cc27e3703ce9484aab91 /tools/perf/scripts/python
parent1a56fcf08ae463a4564d111356091b2bdb6c7bce (diff)
drm: bridge: samsung-dsim: fix blanking packet size calculation
Scale the blanking packet sizes to match the ratio between HS clock and DPI interface clock. The controller seems to do internal scaling to the number of active lanes, so we don't take those into account. Signed-off-by: Lucas Stach <[email protected]> Signed-off-by: Adam Ford <[email protected]> Tested-by: Chen-Yu Tsai <[email protected]> Tested-by: Frieder Schrempf <[email protected]> Tested-by: Marek Szyprowski <[email protected]> Reviewed-by: Jagan Teki <[email protected]> Tested-by: Jagan Teki <[email protected]> # imx8mm-icore Signed-off-by: Neil Armstrong <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
Diffstat (limited to 'tools/perf/scripts/python')
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