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| author | Alexey Firago <[email protected]> | 2017-04-07 12:12:23 +0300 |
|---|---|---|
| committer | Stephen Boyd <[email protected]> | 2017-04-19 09:08:48 -0700 |
| commit | a330b6f5d1aee83fb2554d00ad33877b91a74c0c (patch) | |
| tree | 9d5288e5e49b7cd9a346cd12f01a2422ae3437af /tools/perf/scripts/python | |
| parent | 9adddb01ce5f71ae5c26b8aff01335d40be55133 (diff) | |
clk: vc5: Add bindings for IDT VersaClock 5P49V5935
IDT VersaClock 5 5P49V5935 has 4 clock outputs, 4 fractional dividers.
Input clock source can be taken from either integrated crystal or from
external reference clock.
Signed-off-by: Alexey Firago <[email protected]>
Acked-by: Rob Herring <[email protected]>
Signed-off-by: Stephen Boyd <[email protected]>
Diffstat (limited to 'tools/perf/scripts/python')
0 files changed, 0 insertions, 0 deletions