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authorAndre Przywara <[email protected]>2022-03-17 16:23:44 +0000
committerJernej Skrabec <[email protected]>2022-04-06 22:26:50 +0200
commita26123f355f23d8ba980d7ecf4899d309d5cd708 (patch)
tree4c9dea86cd8af825a294436838885e20894a490b /tools/perf/scripts/python
parenta6d9efb62a482c2da1078d9654b68a0777aa2fc6 (diff)
ARM: dts: suniv: F1C100: fix timer node
The Allwinner F1C100s has three timer instances, each with their own interrupt line. Add the missing two interrupts to the DT node, to match the DT binding. Signed-off-by: Andre Przywara <[email protected]> Acked-by: Samuel Holland <[email protected]> Signed-off-by: Jernej Skrabec <[email protected]> Link: https://lore.kernel.org/r/[email protected]
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