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authorStephen Boyd <sboyd@kernel.org>2024-09-05 11:30:59 -0700
committerStephen Boyd <sboyd@kernel.org>2024-09-05 11:30:59 -0700
commita09e3cf770bcffa40f22cc2f0f4d24a84f937f26 (patch)
treefd2e0a6184539aab059aced416a9b4f525adf8ce /tools/perf/scripts/python
parent9395f3d21d4b4404f4e863c1df0c84d23a4df3c9 (diff)
parentaf05917c221e97d723017b157e6e2d373f81a47f (diff)
Merge branch 'clk-imx-old' into clk-imx
* clk-imx: (22 commits) clk: imx: composite-7ulp: Use NULL instead of 0 clk: imx: add missing MODULE_DESCRIPTION() macros clk: imx: clk-imx8mp: Allow media_disp pixel clock reconfigure parent rate clk: imx: fracn-gppll: update rate table clk: imx: imx8qxp: Parent should be initialized earlier than the clock clk: imx: imx8qxp: Register dc0_bypass0_clk before disp clk clk: imx: imx8qxp: Add clock muxes for MIPI and PHY ref clocks clk: imx: imx8qxp: Add LVDS bypass clocks clk: imx: imx8mm: Change the 'nand_usdhc_bus' clock to non-critical one clk: imx: imx8mn: add sai7_ipg_clk clock settings clk: imx: add CLK_SET_RATE_PARENT for lcdif_pixel_src for i.MX7D clk: imx: Remove CLK_SET_PARENT_GATE for DRAM mux for i.MX7D clk: imx: imx8mp: fix clock tree update of TF-A managed clocks clk: imx: fracn-gppll: fix fractional part of PLL getting lost clk: imx: composite-7ulp: Check the PCC present bit clk: imx: composite-93: keep root clock on when mcore enabled clk: imx: composite-8m: Enable gate clk with mcore_booted clk: imx: imx6ul: fix default parent for enet*_ref_sel clk: imx: clk-audiomix: Correct parent clock for earc_phy and audpll clk: imx: clk-audiomix: Add CLK_SET_RATE_PARENT flags for clocks ...
Diffstat (limited to 'tools/perf/scripts/python')
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