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authorAdam Nelson <[email protected]>2024-04-09 17:38:44 -0400
committerAlex Deucher <[email protected]>2024-05-13 15:46:27 -0400
commit9de99fa8c1eab5d7d1f363dcba0786a9b9cc51f4 (patch)
tree4ad2c7714c2140cae285f4fb72bac87c35973e80 /tools/perf/scripts/python
parent3ecb039847dcc3d8d683c8aec94e0901dfff518a (diff)
drm/amd/display: Fix 3dlut size for Fastloading on DCN401
[WHY] After a non-3dlut test the MPCC_MCM_3DLUT_MODE::MPCC_MCM_3DLUT_SIZE is incorrect. [HOW] Add register write to make valid. Acked-by: Alex Hung <[email protected]> Reviewed-by: Rodrigo Siqueira <[email protected]> Signed-off-by: Adam Nelson <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
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