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authorVille Syrjälä <[email protected]>2022-03-09 23:43:01 +0200
committerVille Syrjälä <[email protected]>2022-03-10 11:07:31 +0200
commit9ca48a806cf241e9fe374206b8b0dd9c80ccdde3 (patch)
tree14f61e9a87a1c63fb14e7c4662d6557aed8a18c4 /tools/perf/scripts/python
parent8d8b2dd3995f80f26723ad61865e1eb265225561 (diff)
drm/i915: Store the /5 target clock in struct dpll on vlv/chv
Unify vlv/chv with earlier platforms so that the sturct dpll::dot represents the /5 clock frequency (ie. DP symbol rate or HDMI TMDS rate) rather than the *5 fast clock (/2 of the bitrate). Makes life a little less confusing to get the same number back in .dot which we fed into the DPLL algorithm. v2: Actually just include the 5x in the final P divider Do the same change to the hand rolled gvt code v3: Missed a few *5 in *_find_best_dpll() Reviewed-by: Jani Nikula <[email protected]> Signed-off-by: Ville Syrjälä <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
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