diff options
| author | Nicholas Piggin <[email protected]> | 2017-04-07 11:27:44 +1000 |
|---|---|---|
| committer | Michael Ellerman <[email protected]> | 2017-04-13 23:34:32 +1000 |
| commit | 9b7ff0c6586bc0541ebcd1ff6773b11a49f1a058 (patch) | |
| tree | c7b8f96f7e244d47dd6240e0e06d6929a9bc4cbd /tools/perf/scripts/python | |
| parent | 794464f4dea0b13dacad267c06a01fc9c24f713a (diff) | |
powerpc/64s: Add SCV FSCR bit for ISA v3.0
Add the bit definition and use it in facility_unavailable_exception() so we can
intelligently report the cause if we take a fault for SCV. This doesn't actually
enable SCV.
Signed-off-by: Nicholas Piggin <[email protected]>
[mpe: Drop whitespace changes to the existing entries, flush out change log]
Signed-off-by: Michael Ellerman <[email protected]>
Diffstat (limited to 'tools/perf/scripts/python')
0 files changed, 0 insertions, 0 deletions