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authorJonathan Cameron <[email protected]>2022-05-08 18:56:54 +0100
committerJonathan Cameron <[email protected]>2022-06-14 11:53:18 +0100
commit966d2f4ee7f6e189df47abf67223266ad31e201f (patch)
treee246a7367268a54a85f78923b17be46c74e6b884 /tools/perf/scripts/python
parentff3211b2ba9afac80ceb795d148831dd879b30b7 (diff)
iio: gyro: adxrs450: Fix alignment for DMA safety
____cacheline_aligned is an insufficient guarantee for non-coherent DMA on platforms with 128 byte cachelines above L1. Switch to the updated IIO_DMA_MINALIGN definition. Fixes tag is inaccurate but unlikely anyone will be interested in backporting beyond that point. Fixes: 53ac8500ba9b ("staging:iio:adxrs450: Move header file contents to main file") Signed-off-by: Jonathan Cameron <[email protected]> Acked-by: Nuno Sá <[email protected]> Link: https://lore.kernel.org/r/[email protected]
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