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| author | Dmytro Laktyushkin <[email protected]> | 2022-04-08 10:10:04 -0400 |
|---|---|---|
| committer | Alex Deucher <[email protected]> | 2022-04-25 17:06:16 -0400 |
| commit | 89c342a9661838b9afe3988418705f877f496928 (patch) | |
| tree | 93801b1b0839ef5e50f821d39a6fd466e365bfb6 /tools/perf/scripts/python | |
| parent | 259f249c4b9b2a9dc15095afd071bcc5b8d6f30e (diff) | |
drm/amd/display: update dcn315 clk table read
Clean up the sequence by making sure clk_mgr always builds a
reasonable clock table regardless of what we read from smu
by moving all defaults from resource soc struct to clk_mgr.
Now the only thing resource soc update does is read
the clock table and apply any DC specific policy decisions
to how clocks are populated in dml soc.
Reviewed-by: Qingqing Zhuo <[email protected]>
Acked-by: Tom Chung <[email protected]>
Signed-off-by: Dmytro Laktyushkin <[email protected]>
Tested-by: Daniel Wheeler <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
Diffstat (limited to 'tools/perf/scripts/python')
0 files changed, 0 insertions, 0 deletions