diff options
| author | Jonathan Cameron <[email protected]> | 2022-05-08 18:56:17 +0100 |
|---|---|---|
| committer | Jonathan Cameron <[email protected]> | 2022-06-14 11:53:15 +0100 |
| commit | 8966b11e5a14aaabc747ee97a7942fd50a681402 (patch) | |
| tree | 6100050194f387d70807de5c4e2e752020c1520e /tools/perf/scripts/python | |
| parent | dd54ba8b2469f6ae665c529623a9454ce5293ca8 (diff) | |
iio: adc: ti-ads8344: Fix alignment for DMA safety
____cacheline_aligned is an insufficient guarantee for non-coherent DMA
on platforms with 128 byte cachelines above L1. Switch to the updated
IIO_DMA_MINALIGN definition.
Fixes: 8dd2d7c0fed7 ("iio: adc: Add driver for the TI ADS8344 A/DC chips")
Signed-off-by: Jonathan Cameron <[email protected]>
Acked-by: Nuno Sá <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Diffstat (limited to 'tools/perf/scripts/python')
0 files changed, 0 insertions, 0 deletions