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authorPaul Burton <[email protected]>2017-08-12 19:49:36 -0700
committerRalf Baechle <[email protected]>2017-08-30 00:57:27 +0200
commit856fbcee6099a292f62b9d23c946704f9ffe19f3 (patch)
tree0d8ce9d944488b8e3e00852cce60c75334def972 /tools/perf/scripts/python
parentf875a832d2028523f9b53c261b67e05a359bab8b (diff)
MIPS: Store core & VP IDs in GlobalNumber-style variable
This patch modifies the way we store core & VP IDs such that we store them in a single 32 bit integer whose format matches that of the MIPSr6 GlobalNumber register. Whereas we have previously stored core & VP IDs in separate fields, storing them in a single GlobalNumber-like field: 1) Reduces the size of struct cpuinfo_mips by 4 bytes, and will allow it to not grow when cluster support is added. 2) Gives us a natural place to store cluster number, which matches up with what the architecture provides. 3) Will be useful in the future as a parameter to the MIPSr6 GINVI instruction to specify a target CPU whose icache that instruction should operate on. The cpu_set*() accessor functions are moved out of the asm/cpu-info.h header in order to allow them to use the WARN_ON macro, which is unusable in asm/cpu-info.h due to include ordering. Signed-off-by: Paul Burton <[email protected]> Cc: [email protected] Patchwork: https://patchwork.linux-mips.org/patch/17010/ Signed-off-by: Ralf Baechle <[email protected]>
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