diff options
| author | Jonathan Cameron <[email protected]> | 2022-08-13 17:06:00 +0100 |
|---|---|---|
| committer | Jonathan Cameron <[email protected]> | 2022-08-20 12:54:43 +0100 |
| commit | 83856aaab45da0fd34f94aac0371ba80668c1dbc (patch) | |
| tree | a28217a737f17bfde52775b43cee3cf178e75dbc /tools/perf/scripts/python | |
| parent | 14a4d22ead0d9c01a6d7e9cb7f1d321dd29d354b (diff) | |
staging: iio: frequency: ad9832: Fix alignment for DMA safety
____cacheline_aligned is an insufficient guarantee for non-coherent DMA
on platforms with 128 byte cachelines above L1. Switch to the updated
IIO_DMA_MINALIGN definition. Whilst here, move the marking to cover
the whole union. That has no functional affect, but makes it slightly
easier to see what is going on.
Signed-off-by: Jonathan Cameron <[email protected]>
Reviewed-by: Andy Shevchenko <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Diffstat (limited to 'tools/perf/scripts/python')
0 files changed, 0 insertions, 0 deletions