diff options
| author | Boqun Feng <[email protected]> | 2015-11-02 09:30:32 +0800 |
|---|---|---|
| committer | Michael Ellerman <[email protected]> | 2015-12-14 20:39:01 +1100 |
| commit | 81d7a3294de7e9828310bbf986a67246b13fa01e (patch) | |
| tree | 5bf300937eb52355f7719898e5ab00e2002a6525 /tools/perf/scripts/python | |
| parent | 49e9cf3f0c04bf76ffa59242254110309554861d (diff) | |
powerpc: Make {cmp}xchg* and their atomic_ versions fully ordered
According to memory-barriers.txt, xchg*, cmpxchg* and their atomic_
versions all need to be fully ordered, however they are now just
RELEASE+ACQUIRE, which are not fully ordered.
So also replace PPC_RELEASE_BARRIER and PPC_ACQUIRE_BARRIER with
PPC_ATOMIC_ENTRY_BARRIER and PPC_ATOMIC_EXIT_BARRIER in
__{cmp,}xchg_{u32,u64} respectively to guarantee fully ordered semantics
of atomic{,64}_{cmp,}xchg() and {cmp,}xchg(), as a complement of commit
b97021f85517 ("powerpc: Fix atomic_xxx_return barrier semantics")
This patch depends on patch "powerpc: Make value-returning atomics fully
ordered" for PPC_ATOMIC_ENTRY_BARRIER definition.
Cc: [email protected] # 3.2+
Signed-off-by: Boqun Feng <[email protected]>
Reviewed-by: Paul E. McKenney <[email protected]>
Acked-by: Peter Zijlstra (Intel) <[email protected]>
Signed-off-by: Michael Ellerman <[email protected]>
Diffstat (limited to 'tools/perf/scripts/python')
0 files changed, 0 insertions, 0 deletions