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authorRex-BC Chen <[email protected]>2022-05-05 19:52:17 +0800
committerViresh Kumar <[email protected]>2022-05-12 10:38:14 +0530
commit818c8321d8def50971188b8b33ef2a43ca1e2511 (patch)
treef62b742d38873ba2c4bc85db33e347afbe13c738 /tools/perf/scripts/python
parent85f5b3c437c927526ab2c4af962dceec08ae58c6 (diff)
dt-bindings: cpufreq: mediatek: Add MediaTek CCI property
MediaTek Cache Coherent Interconnect (CCI) uses software devfreq module for scaling clock frequency and adjust voltage. The phandle could be linked between CPU and MediaTek CCI for some MediaTek SoCs, like MT8183 and MT8186. The reason we need the link status between cpufreq and MediaTek cci is cpufreq and mediatek cci could share the same regulator in some MediaTek SoCs. Therefore, to prevent the issue of high frequency and low voltage, we need to use this to make sure mediatek cci is ready. Signed-off-by: Rex-BC Chen <[email protected]> Reviewed-by: AngeloGioacchino Del Regno <[email protected]> Acked-by: Rob Herring <[email protected]> Signed-off-by: Viresh Kumar <[email protected]>
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