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authorSwapnil Patel <[email protected]>2023-03-01 14:33:33 -0500
committerAlex Deucher <[email protected]>2023-03-06 15:27:31 -0500
commit7a1bb27b6ba8a05b51c1589dd9d53eb43a9e9843 (patch)
treee06837d09de95bd560d004c80c4c4e1c746503d4 /tools/perf/scripts/python
parentc1aafd6399a3fd35594778acc618075e1bac81d4 (diff)
drm/amd/display: Update clock table to include highest clock setting
[Why] Currently, the clk manager matches SocVoltage with voltage from fused settings (dfPstate clock table). And then corresponding clocks are selected. However in certain situations, this leads to clk manager not including at least one entry with highest supported clock setting. [How] Update the clk manager to include at least one entry with highest supported clock setting. Reviewed-by: Pavle Kotarac <[email protected]> Acked-by: Qingqing Zhuo <[email protected]> Signed-off-by: Swapnil Patel <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
Diffstat (limited to 'tools/perf/scripts/python')
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