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authorKent Overstreet <[email protected]>2023-08-03 16:38:36 -0400
committerKent Overstreet <[email protected]>2023-10-22 17:10:09 -0400
commit77212d3a76a4becabeac8736b686a533dd75913b (patch)
treeb30b3578d6cf6c818d8556ef963cfcc789885655 /tools/perf/scripts/python
parent6c6439650ec913c83d48055da63b8f204075afb7 (diff)
bcachefs: Fix shift by 64 in set_inc_field()
UBSAN was complaining about a shift by 64 in set_inc_field(). This only happened when the value being shifted was 0, so in theory should be harmless - a shift by 64 (or register width) should logically give a result of 0, but CPUs will in practice leave the input unchanged when the number of bits to shift by wraps - and since our input here is 0, the output is still what we want. But, it's still undefined behaviour and we need our UBSAN output to be clean, so it needs to be fixed. Signed-off-by: Kent Overstreet <[email protected]>
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