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| author | Aneesh Kumar K.V <[email protected]> | 2020-07-01 12:52:33 +0530 |
|---|---|---|
| committer | Michael Ellerman <[email protected]> | 2020-07-16 13:00:23 +1000 |
| commit | 76e6c73f33d4e1cc4de4f25c0bf66d59e42113c4 (patch) | |
| tree | c76d88ed281803424e6ed5b2635874209af25889 /tools/perf/scripts/python | |
| parent | 3e79f082ebfc130360bcee23e4dd74729dcafdf4 (diff) | |
powerpc/pmem: Update ppc64 to use the new barrier instruction.
pmem on POWER10 can now use phwsync instead of hwsync to ensure
all previous writes are architecturally visible for the platform
buffer flush.
Signed-off-by: Aneesh Kumar K.V <[email protected]>
Signed-off-by: Michael Ellerman <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Diffstat (limited to 'tools/perf/scripts/python')
0 files changed, 0 insertions, 0 deletions