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authorFangzhi Zuo <[email protected]>2023-02-28 21:34:58 -0500
committerAlex Deucher <[email protected]>2023-03-29 17:21:06 -0400
commit68dc1846c3a44d5e633be145c169ce2fd5420695 (patch)
treea91aa1da086d83359c0a82e3b64009e01173c125 /tools/perf/scripts/python
parentf4f3b7dedbe849e780c779ba67365bb1db0d8637 (diff)
drm/amd/display: Take FEC Overhead into Timeslot Calculation
8b/10b encoding needs to add 3% fec overhead into the pbn. In the Synapcis Cascaded MST hub, the first stage MST branch device needs the information to determine the timeslot count for the second stage MST branch device. Missing this overhead will leads to insufficient timeslot allocation. Cc: [email protected] Cc: Mario Limonciello <[email protected]> Reviewed-by: Hersen Wu <[email protected]> Acked-by: Qingqing Zhuo <[email protected]> Signed-off-by: Fangzhi Zuo <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
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