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| author | Inochi Amaoto <[email protected]> | 2023-10-19 07:18:53 +0800 |
|---|---|---|
| committer | Conor Dooley <[email protected]> | 2023-11-30 12:40:36 +0000 |
| commit | 681ec684a741ed3ac2c6b283b56245effa7a2c9d (patch) | |
| tree | 68a934160da28a59cd0a84f8144246dcf1ebee9a /tools/perf/scripts/python | |
| parent | dd791b45c866b735601605b8dbceed4ab147db38 (diff) | |
riscv: dts: sophgo: add initial CV1812H SoC device tree
Add initial device tree for the CV1812H RISC-V SoC by SOPHGO.
Signed-off-by: Inochi Amaoto <[email protected]>
Acked-by: Chen Wang <[email protected]>
Signed-off-by: Conor Dooley <[email protected]>
Diffstat (limited to 'tools/perf/scripts/python')
0 files changed, 0 insertions, 0 deletions