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authorTudor Ambarus <tudor.ambarus@linaro.org>2024-02-16 14:04:47 +0000
committerKrzysztof Kozlowski <krzysztof.kozlowski@linaro.org>2024-03-25 12:11:54 +0100
commit65993c76e64a2fa71ffd05ce260f553d1b3e904f (patch)
tree550ebf3b4d2ca48c734ec9c6ab4000407dea19bc /tools/perf/scripts/python
parent4cece764965020c22cff7665b18a012006359095 (diff)
arm64: dts: exynos5433: specify the SPI FIFO depth
Up to now the SPI alias was used as an index into an array defined in the SPI driver to determine the SPI FIFO depthj Drop the dependency on the SPI alias and specify the SPI FIFO depth directly into the SPI node. The FIFO depth were determined based on the SPI aliases that are defined in exynos5433-tm2-common.dtsi: spi0 = &spi_0; spi1 = &spi_1; spi2 = &spi_2; spi3 = &spi_3; spi4 = &spi_4; spi-s3c64xx.c driver defines the following fifo_lvl_mask for the "samsung,exynos5433-spi" compatible: .fifo_lvl_mask = { 0x1ff, 0x7f, 0x7f, 0x7f, 0x7f, 0x1ff}, Thus spi{0, 4} were considered having 256 byte FIFO depths, and spi{1, 2, 3} having 64 byte FIFO depths. Update device tree with these FIFO depths. No functional change expected. Signed-off-by: Tudor Ambarus <tudor.ambarus@linaro.org> Link: https://lore.kernel.org/r/20240216140449.2564625-6-tudor.ambarus@linaro.org Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Diffstat (limited to 'tools/perf/scripts/python')
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