diff options
| author | Athira Rajeev <[email protected]> | 2020-07-23 03:32:37 -0400 |
|---|---|---|
| committer | Michael Ellerman <[email protected]> | 2020-07-26 23:34:23 +1000 |
| commit | 65156f2b1d9d5bf3fd0eac54b0a7fd515c92773c (patch) | |
| tree | c716bcfb139aae54a306f0ec4b48d5554f58b467 /tools/perf/scripts/python | |
| parent | 84d8505ed1dafb2e62d49fca5e7aa7d96cfcec49 (diff) | |
powerpc/perf: Initialize power10 PMU registers in cpu setup routine
Initialize Monitor Mode Control Register 3 (MMCR3)
SPR which is new in power10. For PowerISA v3.1, BHRB disable
is controlled via Monitor Mode Control Register A (MMCRA) bit,
namely "BHRB Recording Disable (BHRBRD)". This patch also initializes
MMCRA BHRBRD to disable BHRB feature at boot for power10.
Reported-by: kernel test robot <[email protected]>
Signed-off-by: Athira Rajeev <[email protected]>
Reviewed-by: Jordan Niethe <[email protected]>
Signed-off-by: Michael Ellerman <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Diffstat (limited to 'tools/perf/scripts/python')
0 files changed, 0 insertions, 0 deletions