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authorVille Syrjälä <[email protected]>2017-10-24 12:52:08 +0300
committerVille Syrjälä <[email protected]>2017-10-25 13:40:00 +0300
commit64600bd5b8280208dfbd33bcd7a5f32255058f07 (patch)
tree2111e36fe54ffc7f628edcb8535f9c639eba5967 /tools/perf/scripts/python
parent2b58417ffbca9fafa1d54b9f1272965f98f456ca (diff)
drm/i915: Start tracking voltage level in the cdclk state
For CNL we'll need to start considering the port clocks when we select the voltage level for the system agent. To that end start tracking the voltage in the cdclk state (since that already has to adjust it). v2: s/voltage/voltage_level/ (Rodrigo) Cc: Mika Kahola <[email protected]> Cc: Manasi Navare <[email protected]> Cc: Rodrigo Vivi <[email protected]> Signed-off-by: Ville Syrjälä <[email protected]> Reviewed-by: Rodrigo Vivi <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
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