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| author | Varadarajan Narayanan <[email protected]> | 2023-10-20 11:49:37 +0530 |
|---|---|---|
| committer | Bjorn Andersson <[email protected]> | 2023-10-21 12:54:53 -0700 |
| commit | 62073bc9f1ecc0d91fc260e7ae380cbadd33e9fc (patch) | |
| tree | 2dd5522b1c2432267fd0c6e22f3eb8945ab3a86a /tools/perf/scripts/python | |
| parent | 032ff6a3b39addd54427844affaf21e1e80fabc2 (diff) | |
arm64: dts: qcom: ipq5332: populate the opp table based on the eFuse
IPQ53xx have different OPPs available for the CPU based on
SoC variant. This can be determined through use of an eFuse
register present in the silicon.
Add support to read the eFuse and populate the OPPs based on it.
------------------------------------------------
Frequency BIT2 BIT1 opp-supported-hw
1.1GHz 1.5GHz
------------------------------------------------
1100000000 1 1 0x7
1500000000 0 1 0x3
------------------------------------------------
Signed-off-by: Kathiravan T <[email protected]>
Signed-off-by: Varadarajan Narayanan <[email protected]>
Link: https://lore.kernel.org/r/463f01759cedef3121767d2432aa415794036ce1.1697781921.git.quic_varada@quicinc.com
Signed-off-by: Bjorn Andersson <[email protected]>
Diffstat (limited to 'tools/perf/scripts/python')
0 files changed, 0 insertions, 0 deletions