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authorAmelie Delaunay <[email protected]>2021-01-05 10:05:21 +0100
committerVinod Koul <[email protected]>2021-01-13 20:40:21 +0530
commit613a475f0be10930474b5cf67c1c9aaa0c992798 (patch)
tree23f539b9b2bbed14c9069a2262afbb3d49fbb64b /tools/perf/scripts/python
parent00a9f71760376749e0857b43a8573803b1a075dc (diff)
phy: stm32: manage 1v1 and 1v8 supplies at pll activation/deactivation
PLL block requires to be powered with 1v1 and 1v8 supplies to catch ENABLE signal. Currently, supplies are managed through phy_ops .power_on/off, and PLL activation/deactivation is managed through phy_ops .init/exit. The sequence of phy_ops .power_on/.phy_init, .power_off/.exit is USB drivers dependent. To ensure a good behavior of the PLL, supplies have to be managed at PLL activation/deactivation. That means the supplies need to be put in usbphyc node and not in phy children nodes. Signed-off-by: Amelie Delaunay <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Vinod Koul <[email protected]>
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