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authorPaul Burton <[email protected]>2015-09-22 11:12:11 -0700
committerRalf Baechle <[email protected]>2015-11-11 08:34:25 +0100
commit609cf6f2291a69d09aa5c02d74cd4488b19aa9a6 (patch)
tree3c17a4ce3e1fe4f5b932116802ef5eaa70afab85 /tools/perf/scripts/python
parent195cee92afcb20b2156437e98b144d94812e4afd (diff)
MIPS: CPS: Early debug using an ns16550-compatible UART
Provide support for outputting early debug information, in the form of various register values should an exception occur, during the early bringup of secondary cores. This code requires an ns16550-compatible UART accessible from the secondary core, and is written in assembly due to the environment in which such early exceptions occur where way may not have a stack, be coherent or even have initialised caches. [[email protected]: Fix merge conflict.] Signed-off-by: Paul Burton <[email protected]> Cc: [email protected] Cc: Steven J. Hill <[email protected]> Cc: Andrew Bresticker <[email protected]> Cc: Leonid Yegoshin <[email protected]> Cc: Maciej W. Rozycki <[email protected]> Cc: Jason Cooper <[email protected]> Cc: [email protected] Cc: James Hogan <[email protected]> Cc: Markos Chandras <[email protected]> Patchwork: https://patchwork.linux-mips.org/patch/11202/ Signed-off-by: Ralf Baechle <[email protected]>
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