diff options
| author | Dinh Nguyen <[email protected]> | 2022-01-25 10:18:19 -0600 |
|---|---|---|
| committer | Greg Kroah-Hartman <[email protected]> | 2022-02-11 11:15:22 +0100 |
| commit | 56f26f177b26de041edef245562b68eb857093fc (patch) | |
| tree | 78f2909ceb03da5315c04a1a8f77417eb7013003 /tools/perf/scripts/python | |
| parent | 6a3cd5bef2531a1178234efa3bed788e3b3831f0 (diff) | |
dt-bindings: usb: dwc2: add compatible "intel,socfpga-agilex-hsotg"
Add the compatible "intel,socfpga-agilex-hsotg" to the DWC2
implementation, because the Agilex DWC2 implementation does not support
clock gating.
Acked-by: Rob Herring <[email protected]>
Signed-off-by: Dinh Nguyen <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Greg Kroah-Hartman <[email protected]>
Diffstat (limited to 'tools/perf/scripts/python')
0 files changed, 0 insertions, 0 deletions