diff options
| author | Dharageswari R <[email protected]> | 2016-06-03 18:29:37 +0530 |
|---|---|---|
| committer | Mark Brown <[email protected]> | 2016-06-07 14:19:11 +0100 |
| commit | 51a01b8c2ea632ed9a57f98c234a0cd9dafe181a (patch) | |
| tree | 7c13c502568b2af9cfce3f34f477deaeaad586d4 /tools/perf/scripts/python | |
| parent | 1ae7ca041a460502b0f9877d84d0f0d9bed9cb72 (diff) | |
ASoC: Intel: Skylake: Disable SRAM Retention before D3
SW needs to set the PGCTL.LSRMD = 1 to disable LPSRAM retention
feature,otherwise it may lead to SRAM ECC Errors.
Signed-off-by: Dharageswari R <[email protected]>
Signed-off-by: Jeeja KP <[email protected]>
Signed-off-by: Vinod Koul <[email protected]>
Signed-off-by: Mark Brown <[email protected]>
Diffstat (limited to 'tools/perf/scripts/python')
0 files changed, 0 insertions, 0 deletions