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authorLad Prabhakar <[email protected]>2022-10-28 17:59:19 +0100
committerGeert Uytterhoeven <[email protected]>2022-11-10 16:36:34 +0100
commit4adb690aa1b41c1e52af579574d1d6aa58da1187 (patch)
treed51325a8e57080343ecc16b3fc65768e71ba4d32 /tools/perf/scripts/python
parentb3e77da00f1b7b670983c69d0295f4ce132bf87c (diff)
riscv: dts: renesas: Add minimal DTS for Renesas RZ/Five SMARC EVK
Enable the minimal blocks required for booting the Renesas RZ/Five SMARC EVK with initramfs. Below are the blocks which are enabled: - CPG - CPU0 - DDR (memory regions) - PINCTRL - PLIC - SCIF0 As we are reusing the RZ/G2UL SoC base DTSI [0], RZ/G2UL SMARC SoM [1] and carrier [2] board DTSIs which enables almost all the blocks supported by the RZ/G2UL SMARC EVK and whereas on RZ/Five SoC we will be gradually enabling the blocks hence the aliases for ETH/I2C are deleted and rest of the IP blocks are marked as disabled/deleted. [0] arch/arm64/boot/dts/renesas/r9a07g043.dtsi [1] arch/arm64/boot/dts/renesas/rzg2ul-smarc-som.dtsi [2] arch/arm64/boot/dts/renesas/rzg2ul-smarc.dtsi Signed-off-by: Lad Prabhakar <[email protected]> Reviewed-by: Conor Dooley <[email protected]> Acked-by: Palmer Dabbelt <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Geert Uytterhoeven <[email protected]>
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